Matteo Rizzo
@_MatteoRizzo
Security engineer, CTF player for @0rganizers. Mastodon: @[email protected]
We are very happy to announce the nominees for the 2025 Pwnie Awards! As a reminder, we will be presenting the winners at DEF CON this year. Saturday the 9th, 10:00AM Main Stage. Hope to see you there! docs.google.com/document/d/1fy…
EntrySign was nominated for two Pwnies (best crypto bug and best desktop bug)! 🥳 youtube.com/live/TuKPA-CeD… @__spq__ @sirdarckcat @taviso
There are plenty of good economic reasons to not prioritize things loading faster, but if anything anywhere in the world takes more than 150ms to load, it was almost certainly not limited by physics, and if the developers have enough time+skill they can almost always speed it up.
Client: Can you make it load faster? Me: Sure, I'll just rewrite the laws of physics.⚡
The recording of our OffensiveCon presentation about EntrySign is live! youtu.be/sUFDKTaCQEk Slides at entrysign.top @sirdarckcat @__spq__
The best talk I have been in a while
The recording of our OffensiveCon presentation about EntrySign is live! youtu.be/sUFDKTaCQEk Slides at entrysign.top @sirdarckcat @__spq__
mandatory watch
The recording of our OffensiveCon presentation about EntrySign is live! youtu.be/sUFDKTaCQEk Slides at entrysign.top @sirdarckcat @__spq__
This is one of the coolest talks I have seen in a while! Incredible research 🔥
The recording of our OffensiveCon presentation about EntrySign is live! youtu.be/sUFDKTaCQEk Slides at entrysign.top @sirdarckcat @__spq__
syzbot.org/upstream#open
Scare a Linux user in less than 5 words 🐧👻
And the video!! youtu.be/sUFDKTaCQEk?si…
We posted our slides! entrysign.top
This was such a great talk, very impressive research 👇
We posted our slides! entrysign.top
#OffensiveCon25 videos are now up! youtube.com/playlist?list=…
300 likes and we'll sponsor again next year @offensive_con
Should I write an article on the minimal steps to make an FPGA board with some of the most popular parts? For example, here's a summary of the key highlights for making a board using the current gen Xilinx UltraScale+ parts: 1) To put down the FPGA part! 2) Connect the power…
"Entrysign: Create Your Own x86 Microcode for Fun and Profit" by @_MatteoRizzo, @__spq__, @sirdarckcat & Josh Eads! Now on stage!
POV you just qualified for some big CTF finals for the fifth year in a row.
We have a training by @SpecterDev & Zi on Attacking Hypervisors From KVM to Mobile Security Platforms hardwear.io/usa-2025/train…
I've published a write-up on reversing and analyzing Samsung's H-Arx hypervisor architecture for Exynos devices, which has had a lot of changes in recent years and pretty interesting design. Hope you all enjoy :) dayzerosec.com/blog/2025/03/0…