logic destroyer
@splinedrive
Hobbyist since 2021 — custom RISC-V SoCs with MMU, running Linux/XV6. Full-stack, from RTL to ASIC. No IP. No bullshit. c / c++ / SystemVerilog
A small step for a hobby logic designer, but a giant leap for @tinytapeout. The first official RISC-V uLinux ASIC, yes, ASIC, you heard that right, is operational and functional. Just dabbling in chip design as a hobbyist. Haha, what an awesome achievement! Thanx to @matthewvenn…
I can only read the code when it’s indented like that because it makes the structure clear and easy to follow.
what is the most beautiful programming language and why is it C++?
All coded in plain Verilog from scratch, without formal verification or testing, just gut feeling and my Linux expertise from work.
🚀 #SLogic16U3 hits 750MHz at 1.5Gsps! It means frontend support upto 750MHz bandwidth (500MHz recommended w/ shielded cables). 💰 old-school USB3 LA is $300 for 1Gsps, but now SLogic16U3 is $69 for 1.5Gsps!
I have officially worked on 10 ish satellites. The real number is way higher as the client does not want to admit they did not have the skills internally for the FPGA or boards designs. It gets funny when you see them congratulated by politicians, you want to say I did that lol.
Share a piece of undisclosed insider space/defense industry information lore about yourself
It’s 2025, and C++ finally says hello like C: #include <print> and println("Hello, C++23 world");
I installed AstroNvim and removed SpaceVim. It’s very nice! By the way, that is C++ code for my scroller.