InstLatX64
@InstLatX64
x86/x64, SIMD, #AVX512, "Aha!" moments. I have been writing code since 1986.
My future posts will be published there first, and here only later
New CPUIDs: - #AMD #KrackanPoint2 CPUID B60F80 [1] - #Intel #BartlettLake CPUID B06F6 [2] [1]: browser.geekbench.com/v6/cpu/12687458 [2]: browser.geekbench.com/v6/cpu/12794012 GitHub: github.com/InstLatx64/Ins… Krackan2 official source: docs.amd.com/r/en-US/xapp13…
New #Intel CPUID dumps: -2C+10c #Core #Ultra 7 265U B0650 #ArrowLakeU 2P+8E+2LPE, #RedwoodCove,#Crestmont,Crestmont -6C+10c Core Ultra 9 285H C0652 #ArrowLakeH 6P+8E+2LPE, #LionCove,#Skymont,Crestmont #AMD steppings - #Raphael #Zen4 A60F13 [1] - #GraniteRidge #Zen5 B40F41 [2] 1/2
New #Intel #PantherLake steppings in coreboot: PTL_B0_1 C06C1 PTL_B0_2 C06C2 review.coreboot.org/c/coreboot/+/8…
Trace of a working A0 #PantherLake (3/3.2GHz, CPUID C06C0, #Intel 18A process) in coreboot project: chromium.googlesource.com/chromiumos/thi…
#Intel #GraniteRapids SKU stack: cdrdv2-public.intel.com/860027/IntelXe…
Plain #Intel #GraniteRapids SKUs: intel.com/content/www/us… #GraniteRapidsD '-B' SKUs: intel.com/content/www/us… But what are these #Xeon6 "-C" SKUs? intel.com/content/www/us… 6984P-C, 6958P-C, 6974P-C, 6973P-C, 6965P-C, 6985P-C, 6961P-C, 6982P-C, 6983P-C, 6981P-C, 6976P-C, 6969P-C etc
It fits the overall picture, according to the 58th ISA Ext Guide, in DMR 2 cores will use one L2 cache. (58th ISA Ext Guide calls #Intel #DiamondRapids 5th generation Xeon due to some mistake) x.com/InstLatX64/sta… #DCM = dual core module
DMR doesn't have SMT
#Intel refreshed the "Flexible Return and Event Delivery" ( #FRED) 346446 pdf to 9.0: cdrdv2-public.intel.com/819481/346446-…
#Intel refreshed the "Flexible Return and Event Delivery (FRED)" 346446 pdf to 7.0: cdrdv2.intel.com/v1/dl/getConte…
#Intel released the 88th edition of the Software Developer’s Manuals with #SLSM (Static LockStep Mode) integrity feature: CPUID.(EAX=07H,ECX=01H):EDX[24]=SLSM All-in-One: cdrdv2-public.intel.com/858440/325462-… Changes: cdrdv2-public.intel.com/858441/252046-…
#Intel released the 87th edition of the Software Developer’s Manuals with universal 128/256/512b #AVX10. #AVX512 defragmentation in #Intel CPUs is complete All-in-One: cdrdv2-public.intel.com/851038/325462-… Changes: cdrdv2-public.intel.com/851055/252046-… 1/8
#Intel released the 58th edition of the ISA Extensions Reference with fixes and clarifications: #PantherLake #DiamondRapids #ClearwaterForest Download: cdrdv2-public.intel.com/859029/319433-… CPUID.(EAX=23H,ECX=0H):EBX[2] = #RDPMCUserDisable
#Intel released the 57th edition of the ISA Extensions Reference with updates: #PantherLake #DiamondRapids #ClearwaterForest Download: cdrdv2-public.intel.com/851355/319433-… #256BITSGX #ASYM_RDT x.com/InstLatX64/sta… 6/8
#AMD #Instinct #MI300 Instruction Set Architecture Reference Guide: amd.com/content/dam/am…
#AMD #CDNA4 Instruction Set Architecture Reference Guide: amd.com/content/dam/am…
#AMD #CDNA4 Instruction Set Architecture Reference Guide: amd.com/content/dam/am…
#AMD #RDNA4 Instruction Set Architecture Reference Guide: amd.com/content/dam/am…
Interesting to read this 4 years later #Intel #DiamondRapids #NovaLake forums.anandtech.com/threads/intel-…
#Hygon C86-4G 3450G CPUID is 910F00 [1] GitHub: github.com/InstLatx64/Ins… [1]: x.com/BenchLeaks/sta… Context: x.com/9550pro/status…
#AMD #Badami / #Trento full CPUID is A30F01 [1] GItHub: github.com/InstLatx64/Ins… [1]: browser.geekbench.com/v6/compute/416…
#AMD #Badami / #Trento full CPUID is A30F01 [1] GItHub: github.com/InstLatx64/Ins… [1]: browser.geekbench.com/v6/compute/416…
New CPUID dump: 16-Core #AMD #Ryzen AI MAX+ 395 #StrixHalo, #Zen5 B70F00 CPUID dump GitHub: github.com/InstLatx64/Ins…
#Intel refreshed the #AVX10_2 specification to 5.0: cdrdv2-public.intel.com/856721/361050-… VDPPHPS is not #AVX10_VNNI_INT, it's much more logical
#Intel refreshed the #AVX10_2 specification to 4.0: cdrdv2-public.intel.com/855340/361050-… CPUID.24h.ECX=1.ECX[2] = #AVX10_VNNI_INT #MOVRS #SM4 #AMX_AVX512 AVX10_VNNI_INT are decoupled from AVX10.2
New CPUID dump: 16-Core #AMD #Ryzen AI MAX+ 395 #StrixHalo, #Zen5 B70F00 CPUID dump GitHub: github.com/InstLatx64/Ins…
#AMD #Zen6 CPUID assignments: - #Weisshorn B50F00 is Zen6 (probably this is the #EPYC / #Venice due to the similarity to the #Breithorn codename [1]) -B90F00, BA0F00, BC0F00 is Zen6 [1] GitHub: github.com/InstLatx64/Ins… [1]:lore.kernel.org/all/2025051320…
#Intel refreshed the #AVX10_2 specification to 4.0: cdrdv2-public.intel.com/855340/361050-… CPUID.24h.ECX=1.ECX[2] = #AVX10_VNNI_INT #MOVRS #SM4 #AMX_AVX512 AVX10_VNNI_INT are decoupled from AVX10.2
#AMD #Zen6 CPUID assignments: - #Weisshorn B50F00 is Zen6 (probably this is the #EPYC / #Venice due to the similarity to the #Breithorn codename [1]) -B90F00, BA0F00, BC0F00 is Zen6 [1] GitHub: github.com/InstLatx64/Ins… [1]:lore.kernel.org/all/2025051320…