Adam Taylor

How about a FPGA community? This could be interesting to share knowledge / learning and help each other. I just created one, link below!

Ensuring your design is functionally correct means verification, one method of helping assess the quality of your test harnesses is Code Coverage. This week we are looking at Vivado Simulator and code coverage using VHDL. The quality of reports and information provided is…

First time I have brought up a Raspberry PI Compute Module and it could not have been easier. So far the Ethernet, Dual USB A, USB C, Dual HDMI have worked flawlessly. Next step is to test the MIPI cameras and SD card before starting on the FPGA Tile bring up and testing. If you…

New board in, the Tile Carrier board which will host our Tile range. The carrier board is designed to take a RP5 Compute module to provide the ability to stimulate, control and interact with the Tiles. Now I just need to find some time it on and start bring up!

If you use MicroChip Libero, what are your major pain points with it?

I call this my just landed back and forgot to sleep on the plane breakfast to power me through the day!

Bumpy up here

Time to head back, to the UK sadly.

Well I said we would do it and we are! FPGA Horizons will be coming to the US in April 2026, two days of FPGA talks and tutorials.

I love FPGA for Image processing applications. This week I am looking at how we might select between different FPGAs for image processing applications. adiuvoengineering.com/post/microzed-…

FPGAs excel at image processing applications. I have just released a white paper which talks all about image processing with FPGAs from sensors, and interfacing to how we implement image processing pipelines and create image processing algorithms! adiuvoengineering.com/marketing-cont…

This week we are taking a look at the Spartan UltraScale+ and the SCU35 development board with a simple pure RTL project. adiuvoengineering.com/post/microzed-…

I work with a lot of clients and one thing I notice especially in larger organisations is engineers do not spend as doing engineering. Writing code, drawing schematics etc, but on many non value added activities. How much of your time as an engineer is spent actually engineering?

The ability to create programmable logic and SoC solutions from several sources which leverage the most appropriate development methodology is key. My latest Hackster project shows how we can create system projects using Vitis System Flow. This flow allows Vitis to create a…

A little Sunday morning fun with a pure RTL design in the SCU35. UART to AXI and PWM to control the intensity of the LED. All controlled by a Jupyter application on the host PC.

We all remember the time I bought a Tornado F3 radar with hilarity. Well I just bought this which is a Flir SAFIRE thermal camera and Sony day camera from the late 90s anyone got a manual ?

I haven't read it yet. It's just released. I got it because @ATaylorFPGA introduced it, and he's the ultimate FPGA authority for me. Will share my review (I'm also a beginner in FPGA by the way)

We have been using Blue Pearl Solutions Visual Verification Suite for a long time to lint and analyse our flight and IP RTL. At DAC recently they announced VVS now contained a simulator. The simulator is pretty cool it provides UVM, Code / Functional coverage support. I like…

@ATaylorFPGA has great material to get you started with #FPGA, often times featuring our Basys 3 or Arty boards. Take a look at his new website!

This week, I am looking at the Embedded+ Architecture which combines a Embedded Ryzen with a Versal AI Edge 2302. It gives us some very interesting capabilities in the embedded space. adiuvoengineering.com/post/microzed-…

The first of the FPGA Horizons news letters has just published. Not only does it contain information on the conference itself but it also contains industry news, information on tool releases and several vetted FPGA Jobs. Please check it out, sign up for future issues and if you…